Units / ECE4813
ECE4813 · Arm based system-on-chip design
2027 Handbook6 credit pointsLevel 4Department of Electrical and Computer Systems Engineering
Overview
Arm architecture underpins the majority of today’s computing platforms, powering billions of devices across mobile, automotive, IoT, and edge-AI applications. In this unit, you will be introduced to Arm technologies and their role in modern system-on-chip (SoC) design. You will study the Arm A-profile architecture, including performance-oriented and heterogeneous processing concepts. You will be exposed to the complete SoC design and implementation flow, with particular emphasis on the front-end design process, including architecture definition, IP selection, AMBA-based integration, RTL design, and functional verification. Through the use of Arm virtual platforms and FPGA-based prototyping, you will gain practical, system-level experience in analysing and demonstrating Arm-based SoC designs suitable for real-world applications.
Areas of study: Minor: Semiconductor
Offerings
| Campus | Teaching period | Mode |
|---|---|---|
| Malaysia | Second semester | Teaching activities are on-campus (ON-CAMPUS) |
Assessment
The Handbook does not list a final examination among the assessment items. That is not a guarantee there is none.
| # | Assessment | Type | Weight | Hurdle |
|---|---|---|---|---|
| 1 | Lab assignments | Exercise | 10% | — |
| 2 | Project task using FPGA/Virtual platform | Project | 70% | — |
| 3 | Midsemester test/Demonstration | Quiz / Test | 20% | — |
Continuous assessment: 100%
Assessment details may change. Please refer to the assessment information in Moodle closer to the start of the teaching period.
Requisites
prerequisite
Learning outcomes
- Design an Arm based System-on-Chip (SoC) architecture that meets specified application and performance requirements.
- Investigate Arm-based SoC design choices through analysis and evaluation of front-end design decisions.
- Apply modern engineering tools, including Arm virtual platforms and field programmable gate array (FPGA) prototyping environments, to demonstrate SoC functionality.
- Demonstrate self-directed learning to implement an SoC that contains Arm core interfaced to peripherals on a FPGA platform.
Workload
The minimum total expected workload to achieve the learning outcomes for this unit is 144 hours per semester typically comprising a mixture of 3-6 hours of scheduled learning activities and 6-9 hours of independent study per week. Scheduled activities may include a combination of teacher-directed learning, peer-directed learning and online engagement. Independent study may include associated readings, assessment and preparation for scheduled activities.
| Activity | Duration |
|---|---|
| Practical activities | 3 hours |
| Assessments | 2 hours |
| Laboratories | 33 hours |
| Workshops | 24 hours |
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