Faculty notice: this unit is changing
Final offering S1 2027
BSE
Replace with FIT2165 from S2 2027 (S2)
From: Re-enrolment and unit changes - Information Technology (undergraduate) · Last checked: 7 Oct 2026 UTC
Official wording from the faculty, shown as published. It is the page of the Faculty of IT on monash.edu, so confirm with your faculty that it applies to your campus and intake year. Replacements are decided by the faculty, not by this site.
Units / FIT3159
FIT3159 · Computer architecture
2027 Handbook6 credit pointsLevel 3Faculty of Information Technology
Overview
This unit covers the internal mechanism of computers and how they are organised and programmed. Topics include combinatorial and sequential logic, Boolean Algebra, counters, ripple adders, tree adders, memory/addressing, busses, speed, DMA, data representation, machine arithmetic, microprogramming, caches and cache architectures, virtual memory and translation look-aside buffers, vectored interrupts, polled interrupts, pipelined architecture, superscalar architecture, data dependency, hazards, CISC, RISC, VLIW machine architectures.
Areas of study: Advanced computer science Computer networks and security
Offerings
| Campus | Teaching period | Mode |
|---|---|---|
| Clayton | First semester | Flexible (FLEXIBLE) |
| Malaysia | First semester | Teaching activities are on-campus (ON-CAMPUS) |
Assessment
The Handbook does not list a final examination among the assessment items. That is not a guarantee there is none.
| # | Assessment | Type | Weight | Hurdle |
|---|---|---|---|---|
| 1 | Laboratory Exercises | Demonstration | 30% | — |
| 2 | Applied session Exercises | Exercise | 20% | — |
| 3 | Applied Problem Solving Tasks | Quiz / Test | 50% | — |
Assessment details may change. Please refer to the assessment information in Moodle closer to the start of the teaching period.
Requisites
Learning outcomes
- Analyse simple logic circuits;
- Explain and analyse key processor components;
- Explain and analyse computer organisation;
- Write and debug simple assembly language programs;
- Use simulator programs to model computer system components.
Workload
Minimum total expected workload to achieve the learning outcomes for this unit is 144 hours per semester typically comprising a mixture of scheduled online and face to face learning activities and independent study. Independent study may include associated reading and preparation for scheduled teaching activities.
| Activity | Duration |
|---|---|
| Applied sessions | 12 hours |
| Laboratories | 18 hours |
| Workshops | 24 hours |
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